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New method to improve durability of nano-electronic components to help further semiconductor manufacturing and resilience

USF Mechanical Engineering assistant professor Michael Cai Wang鈥檚 group recently developed a novel approach to effectively mitigate electromigration, a phenomenon that has long posed challenges for the semiconductor and integrated circuits industry.

USF Mechanical Engineering assistant professor Michael Cai Wang and his research team recently developed a novel approach to mitigating electromigration in nanoscale electronic interconnects that are ubiquitous in state-of-the-art integrated circuits. This was achieved by coating copper metal interconnects with hexagonal boron nitride (hBN), an atomically-thin insulating two-dimensional (2D) material that shares a similar structure as the 鈥渨onder material鈥� graphene.

Electromigration is the phenomenon in which an electrical current passing through a conductor causes the atomic-scale erosion of the material, eventually resulting in device failure. Conventional semiconductor technology addresses this challenge by using a barrier or liner material, but this takes up precious space on the wafer that could otherwise be used to pack in more transistors. Wang鈥檚 approach accomplishes this same goal, but with the thinnest possible materials in the world, two-dimensional (2D) materials.

Cover Advanced Electroinic Materials Journal

脜ngstr枚m-thin hexagonal boron nitride (hBN) is a highly promising barrier/liner dielectric material for passivating electrical interconnects in ultra-scaled integrated circuits (ICs). Yunjo Jeong (USF graduate student in Mechanical Engineering) and co-workers developed a novel approach to mitigating electromigration in nanoscale copper interconnects. Significant improvements in the breakdown current density and operating lifetime are observed in hBN-passivated copper interconnects, paving the way for further single-nanometer node scaling of semiconductor and ICs manufacturing.

鈥淭his work introduces new opportunities for research into the interfacial interactions between metals and 氓ngstr枚m-scale 2D materials. Improving electronic and semiconductor device performance is just one result of this research. The findings from this study opens up new possibilities that can help advance future manufacturing of semiconductors and integrated circuits,鈥� Wang said. 鈥淥ur novel encapsulation strategy using single-layer hBN as the barrier material enables further scaling of device density and the progression of Moore鈥檚 Law.鈥� For reference, a nanometer is 1/60,000 of the thickness of human hair, and an 氓ngstr枚m is one-tenth of a nanometer. Manipulating 2D materials of such thinness requires extreme precision and meticulous handling.

In their recent study published in the journal , copper interconnects passivated with a monolayer hBN via a back-end-of-line (BEOL) compatible approach exhibited more than 2500% longer device lifetime and more than 20% higher current density than otherwise identical control devices. This improvement, coupled with the 氓ngstr枚m-thinness of hBN compared to conventional barrier/liner materials, allows for further densification of integrated circuits. These findings will help advance device efficiency and decrease energy consumption.

鈥淲ith the growing demand for electric vehicles and autonomous driving, the demand for more efficient computing has grown exponentially. The promise of higher integrated circuits density and efficiency will enable development of better ASICs (application-specific integrated circuits) tailored to these emerging clean energy needs.鈥� explained Yunjo Jeong, an alumnus from Wang鈥檚 group and first author of the study.

Wang Research Group

 Researchers from the Nanomechanics, Nanomaterials, NanoManufacturing Laboratory (NM3L) who contributed to this work (from left): Utkarsh Misra (sophomore in Electrical Engineering), Ossie Douglas (PhD student in Mechanical Engineering), and MD Rubayat-E Tanjil (PhD candidate in Mechanical Engineering).

An average modern car has hundreds of microelectronic components, and the significance of these tiny but critical components has been especially highlighted through the recent global chip shortage. Making the design and manufacturing of these integrated circuits more efficient will be key to mitigating possible future disruptions to the supply chain. Wang and his students are now investigating ways to speed up their process to the fab scale.

鈥淥ur findings are not limited only to electrical interconnects in semiconductor research. The fact that we were able to achieve such a drastic interconnect device improvement implies that 2D materials can also be applied to a variety of other scenarios.鈥� Wang added.

This project was in collaboration with researchers from the National Institute for Materials Science (NIMS) of Japan and was supported in part by the University of South Florida (USF) New Researcher Grant (NRG), USF Nexus Initiative (UNI), the ORAU Ralph E. Powe Junior Faculty Enhancement Award, and the National Science Foundation under Grant No. 1944638. Support was also provided in part by the National GEM Consortium Fellowship, Alfred P. Sloan Minority Graduate Scholarship Program, and USF University Graduate Fellowship. Extensive experimental work was completed at the USF Nanotechnology Research and Education Center (NREC).